Best Practices for Using Modular Power to Achieve Efficient, Scalable and Cost-effective PDNs for AI Computing

Many market forces (including economic and competitive) in the edge computing and AI data center domains are driving densification, particularly as these data centers become larger and more capable. Gigawatt AI data centers are now under construction, with an estimated $375B being spent on this infrastructure in 2025. The goal of densification is twofold. The first initiative is to maximize the number of compute trays in each server. This is achieved largely by using direct liquid cooling to eliminate tall convection fan-forced heat sinks, and using low profile components to reduce tray height. These densification measures can eliminate expensive intra-rack optical transceivers among other cost savings. The second initiative is densification at the AI processor module level to free up PCB board space. AI processor modules (such as the OCP accelerator module OAM form factor) are relatively small, and thus the chiplet-based processors (CPUs and GPUs), local HBM memory, I/O SERDES lanes and power electronics all compete for limited PCB area. The packing of these components is limited by thermal constraints. The use of thermally-adept power modules can reduce the PCB area consumed by the point-of load power electronics and enable innovation. This presentation will focus on densification initiatives, with technical and commercial justification details explaining how to develop efficient, scalable, and cost-effective PNDs for edge and data center AI computing.